Imagination Technologies launches PowerVR MSVDX HD-video core

Imagination Technologies, a leader in system-on-chip intellectual property (SoC IP), has announced the immediate availability of the PowerVR MSVDX HD-video core.
PowerVR MSVDX is a multi-standard high definition video decoder core enabling HD-DVD/Blu-ray decode and HD-Broadcast reception with maximised video quality. Imagination provides a full range of technologies for HD-video applications. These technologies are going to be the battleground for impressing customers with the next wave of HD screens.
PowerVR MSVDX supports up to 1080i/1080p and 2048x1024 resolutions and may be configured to support either single streams or up to four multiple streams. The decoder supports the wide range of decode standards including: H.264 (to High Profile), WMV9 (to Main profile), VC1 (to Advanced profile), MPEG-2 (Main profile), MPEG-4 (to Advanced simple profile), DivX (Certified), and JPEG. MSVDX can be configured with any subset of these standards, enabling effective management of codec royalty costs.
David McBrien, VP business development, Imagination Technologies, said: “PowerVR MSVDX goes from video stream reception, through decode, to produce the final picture without the requirement for any processing workload on the host processor other than frame buffer management and basic housekeeping. With the broadest range of supported standards, a small silicon area and comprehensive supporting IP for image enhancement or HDTV baseband MSVDX is the prime choice for HDTV silicon devices.”
Imagination Technologies provides a comprehensive range of HDTV image technologies. Its Display IP includes scalable display pipelines supporting PIP, overlay, advanced de-interlacing and image enhancement enabled by IP including the PowerVR TVE digital TV encoder, the PowerVR PDP pixel display pipeline family and the PowerVR IEP Image Enhancement Processor.
MSVDX can be combined with Imagination Technologies encode IP to create a highly integrated and effective HD-codec solution.
PowerVR MSVDX is also suitable for handheld video devices, such as personal media players, where its advanced block and register level clock gating implementation and small silicon area ensure low power consumption. The design has been optimised to further reduce power by enhancing the ratio of the design that can benefit from register level clock gating. Advanced error recovery is enabled with logic to increase resilience to errors on reception of a corrupted bit-stream. A micro-controller within the stream manager enables high level error recovery while low level activity monitors quickly detect and lock up error conditions. The PowerVR MSVDX design is available as a soft IP macro coded in VHDL with full documentation, Synopsys Design Compiler scripts and VHDL simulation test benches. The core is synthesisable at a minimum of 150 MHz in 0.13 um process.
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